Intel Corporation Needs to Rethink Its Entire Silicon Strategy

By Technology Fool.com

Image credit: Intel.

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Last year, Intel CEO Brian Krzanich spent a good portion of the July earnings call trying to positively spin the fact that the chip giant could no longer bring new chip manufacturing technologies into production at a clip of once every two years.

"The last two technology transitions have signaled that our cadence today is closer to 2.5 years than two," Krzanich said in a prepared statement last year.

Although this wouldn't be a particularly big deal if this "slowdown" were hitting Intel's competitors in the industry (chiefly TSMC ), this isn't actually the case. The competition appears to be iterating to new chip manufacturing technologies at a much more rapid pace.

For example, TSMC went into production on its N16 manufacturing technology in 2015, expects to see significant revenue from its N10 technology beginning in the second quarter of 2017, and plans to go into volume production on its N7 technology in the first half of 2018.

Intel, in contrast, began volume production on its 14-nanometer technology in mid-2014 and won't transition to its 10-nanometer technology until the second half of 2017. Its 7-nanometer process isn't due until 2020.

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Now, Intel has made a big deal of the fact that its "14-nanometer" technology is "better" than TSMC's N16 process and that its 10-nanometer technology will be "better" than what TSMC has in the pipeline for N10.

However, I contend that this argument actually misses the critical point: that TSMC is able to deliver significant process-level improvements to its customers each and every year, while Intel doesn't.

Allow me to explain.

TSMC's sensible steps
From comments made by TSMC management on its most recent earnings call, it would appear that the Taiwan-based chip giant aims to bring process improvements at a rapid clip, even if the jumps from node-to-node aren't as large as they may have been historically.

We saw the beginning of this with TSMC's N20 node. In 2014, TSMC went into mass production on its N20 manufacturing technology, which represented a "shrink" of the prior generation N28 node. It brought substantial area improvements and modest improvements in performance/power.

Then, with the N16 node, TSMC didn't provide material chip area scaling (something that Intel executives routinely gloated about in investor presentations), but transitioned from planar transistors to new FinFET transistors to enable a significant performance increase.

This allowed customers to build substantially faster/better products.

Now, with N10, TSMC is promising both a modest improvement in performance as well as a significant area shrink. For N7, TSMC is, once again, promising an improvement in performance and an area reduction -- though not on the order of what is typically seen in "big" node transitions.

The key, though, is that TSMC's customers can release products that deliver significant improvements in both 2017 on N10 and then again in 2018 on N7.

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Intel's big leaps
In contrast to TSMC's apparent strategy of faster, but more incremental improvements, Intel seems to be more interested in going for "giant leaps." Intel shipped products built on its 14-nanometer node in 2014, it shipped more 14-nanometer product in 2015, is expected to ship even more 14-nanometer product in 2016, and will ship 14-nanometer product in 2017 until it transitions to 10-nanometer chips beginning in late 2017.

Investors can then expect Intel to ship 10-nanometer product in 2018, more 10-nanometer product in 2019, and if things go better at the 7-nanometer node than it did at the 14-nanometer and 10-nanometer nodes, it could ship chips built on 7-nanometer in 2020.

Now, one could conceivably argue that -- at least from a chip area perspective -- Intel's "10-nanometer" will be more like TSMC's "7-nanometer." However, there is something that Intel doesn't seem interested in talking about: transistor performance.

TSMC will ostensibly benefit from material transistor-level improvements in going from N16 to N10 and then again from N10 to N7. Intel will be able to see a transistor level improvement in going from 14-nanometer to 10-nanometer, but then it's essentially "frozen" (aside from some minor tweaks/enhancements) there until the transition to the 7-nanometer node.

This gives TSMC the opportunity to not only catch up with Intel in terms of transistor performance, but to actually surpass it in the worst-case scenario for Intel.

Intel needs to pay attention and respond to competitive threats
If one listens to the prepared remarks that come from Intel executives, the message is clear: Intel has manufacturing technology leadership over the rest of the industry. Indeed, on the conference call last year on which the company announced the 10-nanometer delay, Intel CEO Brian Krzanich said that Intel believes "that [it] will continue to lead with roughly the same leadership position that [it has] today."

I have to wonder if Krzanich still thinks this in light of TSMC's recent public statements.

At any rate, I believe that it would be in Intel's best interests to try to shift to a more "TSMC-like" model in which it delivers smaller, more manageable improvements to its chip manufacturing technologies at a faster pace. This should lead to a faster pace of innovation from the chip-maker and ultimately better products for the chip-maker's customers.

The article Intel Corporation Needs to Rethink Its Entire Silicon Strategy originally appeared on Fool.com.

Ashraf Eassa owns shares of Intel. The Motley Fool recommends Intel. Try any of our Foolish newsletter services free for 30 days. We Fools may not all hold the same opinions, but we all believe that considering a diverse range of insights makes us better investors. The Motley Fool has a disclosure policy.